Source followers and emitter followers are very well known buffer topologies. Examples of p-type metal oxide semiconductor (PMOS) and n-type metal oxide semiconductor (NMOS) source followers are shown, respectively, in FIGS. 1A and 1B. In each case, a current source 102 is used to generate a bias current for a transistor 104, 106 coupled between an input node 108 and an output node 110. As is well understood in the art, when the transistors 104, 106 are properly biased, each will regulate current flow between its drain and source so as to maintain a gate-to-source voltage that is substantially constant. Thus, in the example of FIG. 1A, a voltage VOUT at the output node 110 is maintained at a substantially-constant gate-to-source voltage drop (VGS) below a voltage VIN at the input node 108, regardless of certain changes in the impedance of the load connected to the output node 110. Similarly, in the example of FIG. 1B, the voltage VOUT at the output note 110 is maintained at a substantially-constant gate-to-source voltage drop (VGS) above the voltage VIN at the input node 108, regardless of certain changes in the impedance of the load connected to the output node 110. While there are certainly many more complicated buffer topologies, these followers tend to be the simplest and also some of the most power and noise efficient.